树莓派比较容易被静电损坏,要做好以下预防措施
将SD卡连接到电脑,格式化SD卡
在树莓派官网下载烧录程序,从左到右完成设置,写入SD卡
完成后将SD卡插入卡槽,首次启动还需要连接键盘鼠标和显示器(HDMI转接线),连接电源线后给树莓派上电,完成初始化设定。
$ lscpu
Architecture: armv7l Byte Order: Little Endian CPU(s): 4 On-line CPU(s) list: 0-3 Thread(s) per core: 1 Core(s) per socket: 4 Socket(s): 1 Vendor ID: ARM Model: 3 Model name: Cortex-A72 Stepping: r0p3 CPU max MHz: 1500.0000 CPU min MHz: 600.0000
free -h
$ sudo fdisk -l
$ uname -a
Linux raspberrypi 5.10.63-v7l+ #1459 SMP Wed Oct 6 16:41:57 BST 2021 armv7l GNU/Linux
$ ifconfig
这个命令很重要!!!
$ pinout
从这里可用知道这块树莓派是Model 4B
型号,BCM2711
,可以去读对应的官方文档。
检查树莓派的网络,使用ping
命令
输入命令
$ sudo apt-get install xrdp
回车之后会自动进入安装,安装完成后输入命令
$ ifconfig
记住划线处的IP地址
在主机,按下win + r
组合键,输入cmd
,回车,ping刚刚加下的地址
确认连通后,按下win + q
,输入远程桌面
输入之前记下的IP地址
输入用户名pi
和密码,连接
连接成功!
用远程桌面来操控树莓派,可以省去很多麻烦。
win + Q
搜索远程桌面打开,输入用户名pi
注意不要大写,否则会出现load failed for Display 0
的错误https://shumeipai.nxez.com/2013/10/06/windows-remote-desktop-connection-raspberry-pi.html
SPI总线是一种串行总线
MOTOROLA公司的SPI总线的基本信号线为3根传输线,即
主片通过发出片选信号/cs
来选择和哪个从片进行通信,当某个从片的/cs
信号有效时,便能通过MOSI传输线接受指令、数据,并通过MISO传输线发回数据。
对具有SPI接口的从片器件来讲,SCK、MOSI是输入信号,MISO是输出信号。
指令、地址和数据的变化在SCK的低电平期间进行,并由SCK信号的上升沿锁存。
传出的信息包括状态和数据,信息在SCK信号的下降沿送出。
树莓派提供了一组GPIO接口,找到MOSI和MISO引脚
在官方文档中进一步查询得到更多信息
用一个跳线帽短接MOSI和MISO,让树莓派通过SPI总线实现自发自收
在树莓派的终端输入
$ sudo raspi-config
回车,进入设置界面
![image](https://img20
按下选到3 Interface Options
回车开启SPI总线后,退出设置界面
用命令行创建一个c语言文件,将下列代码粘贴到里面保存
/*代码来源:https://blog.csdn.net/u014357799/article/details/112376163/*/ #include <stdio.h> #include <stdlib.h> #include <unistd.h> #include "SPISet.h" #include <stdint.h> #include <fcntl.h> #include <errno.h> #include <string.h> #include <sys/ioctl.h> #include <asm/ioctl.h> #include <linux/spi/spidev.h> static const char *spiDev0 = "/dev/spidev0.0"; static const char *spiDev1 = "/dev/spidev0.1"; static uint8_t spiBPW = 8; static uint16_t spiDelay = 0; static uint32_t spiSpeeds [2]; static int spiFds [2]; int SPIDataRW ( int channel, unsigned char *tx_data, unsigned char *rx_data, int len ); int SPISetupMode ( int channel, int speed, int mode ); int SPISetup( int channel, int speed ); int initSPI(); int main(){ char tx_Data[] = {1,2,3,4,5,6,7,8,9,10}; char rx_Data[] = {0,0,0,0,0,0,0,0,0,0}; int i = 0; initSPI(); while(1){ SPIDataRW(0, tx_Data, rx_Data, 10); printf("read SPI_rx_data is: \n"); for( i = 0; i < 10; i++ ){ printf("%d\t",rx_Data[i]); } printf("\n"); sleep(1); } return 0; } int initSPI(){ int spiFd; spiFd = SPISetup(0,500000); if( spiFd == -1 ){ printf("init spi failed!\n"); } } int SPIDataRW (int channel, unsigned char *tx_data, unsigned char *rx_data, int len) { int i = 0; struct spi_ioc_transfer spi ; channel &= 1 ; memset (&spi, 0, sizeof (spi)) ; spi.tx_buf = (unsigned long)tx_data ; spi.rx_buf = (unsigned long)rx_data ; spi.len = len ; spi.delay_usecs = spiDelay ; spi.speed_hz = spiSpeeds [channel] ; spi.bits_per_word = spiBPW ; return ioctl (spiFds [channel], SPI_IOC_MESSAGE(1), &spi) ; //SPI_IOC_MESSAGE(1)的1表示spi_ioc_transfer的数量 } int SPISetupMode (int channel, int speed, int mode) { int fd ; if ((fd = open (channel == 0 ? spiDev0 : spiDev1, O_RDWR)) < 0) { printf("Unable to open SPI device: %s\n", strerror (errno)) ; return -1; } spiSpeeds [channel] = speed ; spiFds [channel] = fd ; if (ioctl (fd, SPI_IOC_WR_MODE, &mode) < 0) { printf("Can't set spi mode: %s\n", strerror (errno)) ; return -1; } if (ioctl (fd, SPI_IOC_RD_MODE, &mode) < 0) { printf("Can't get spi mode: %s\n", strerror (errno)) ; return -1; } if (ioctl (fd, SPI_IOC_WR_BITS_PER_WORD, &spiBPW) < 0) { printf("Can't set bits per word: %s\n", strerror (errno)) ; return -1; } if (ioctl (fd, SPI_IOC_RD_BITS_PER_WORD, &spiBPW) < 0) { printf("Can't get bits per word: %s\n", strerror (errno)) ; return -1; } if (ioctl (fd, SPI_IOC_WR_MAX_SPEED_HZ, &speed) < 0) { printf("Can't set max speed hz: %s\n", strerror (errno)); return -1; } if (ioctl (fd, SPI_IOC_RD_MAX_SPEED_HZ, &speed) < 0) { printf("Can't get max speed hz: %s\n", strerror (errno)); return -1; } return fd ; } int SPISetup (int channel, int speed) { return SPISetupMode (channel, speed, 0) ; }
保存后用gcc
命令编译生成.out
文件,执行
取下跳线帽后,再次运行
至此完成了树莓派通过SPI总线自收自发的任务
留坑
留坑
https://blog.csdn.net/u014357799/article/details/112376163
https://panqiincs.me/2020/07/10/rpi-stm32-spi-communication/
仔细阅读官方文档是学习树莓派的必由之路
https://www.raspberrypi.com/documentation/
Raspberry Pi computers use a micro SD card, except for very early models which use a full-sized SD card.
WARNING | Because of a hardware limitation in the Raspberry Pi Zero, 1 and 2, the boot partition on the SD card must be 256GB or less otherwise the device will not boot up. Later models of Raspberry Pi 2 with a BCM2837 SoC, Raspberry Pi 3, 4, and Raspberry Pi 400 do not have this limitation. This does not affect Raspberry Pi OS, which always uses a small boot partition. |
---|---|
We recommend using an SD card of 8GB or greater capacity with Raspberry Pi OS. If you are using the lite version of Raspberry Pi OS, you can use a 4GB card. Other operating systems have different requirements: for example, LibreELEC can run from a smaller card. Please check with the supplier of the operating system to find out what capacity of card they recommend.
We recommend buying anPi SD card from one of our official resellers. The official SD cards are micro SD cards and are supplied with an adaptor which allows them to be used in a full-sized SD card slot.
If you are having problems with your SD card:
The Raspberry Pi has an HDMI port which you can connect directly to a monitor or TV with an HDMI cable. This is the easiest solution; some modern monitors and TVs have HDMI ports, some do not, but there are other options.
Raspberry Pi computers are equipped with a number of SPI buses. SPI can be used to connect a wide variety of peripherals - displays, network controllers (Ethernet, CAN bus), UARTs, etc. These devices are best supported by kernel device drivers, but the spidev
API allows userspace drivers to be written in a wide array of languages.
Rapsberry Pi Zero, 1, 2 and 3 have three SPI controllers:
On the Raspberry Pi 4, 400 and Compute Module 4 there are four additional SPI buses: SPI3 to SPI6, each with 2 hardware chip selects. These extra SPI buses are available via alternate function assignments on certain GPIO pins - see the BCM2711 ARM Peripherals datasheet.
Chapter 10 in the BCM2835 ARM Peripherals datasheet describes the main controller. Chapter 2.3 describes the auxiliary controller.
SPI Function | Header Pin | Broadcom Pin Name | Broadcom Pin Function |
---|---|---|---|
MOSI | 19 | GPIO10 | SPI0_MOSI |
MISO | 21 | GPIO09 | SPI0_MISO |
SCLK | 23 | GPIO11 | SPI0_SCLK |
CE0 | 24 | GPIO08 | SPI0_CE0_N |
CE1 | 26 | GPIO07 | SPI0_CE1_N |
SPI Function | Broadcom Pin Name | Broadcom Pin Function |
---|---|---|
MOSI | GPIO38 | SPI0_MOSI |
MISO | GPIO37 | SPI0_MISO |
SCLK | GPIO39 | SPI0_SCLK |
CE0 | GPIO36 | SPI0_CE0_N |
CE1 | GPIO35 | SPI0_CE1_N |
SPI Function | Header Pin | Broadcom Pin Name | Broadcom Pin Function |
---|---|---|---|
MOSI | 38 | GPIO20 | SPI1_MOSI |
MISO | 35 | GPIO19 | SPI1_MISO |
SCLK | 40 | GPIO21 | SPI1_SCLK |
CE0 | 12 | GPIO18 | SPI1_CE0_N |
CE1 | 11 | GPIO17 | SPI1_CE1_N |
CE2 | 36 | GPIO16 | SPI1_CE2_N |
SPI Function | Broadcom Pin Name | Broadcom Pin Function |
---|---|---|
MOSI | GPIO41 | SPI2_MOSI |
MISO | GPIO40 | SPI2_MISO |
SCLK | GPIO42 | SPI2_SCLK |
CE0 | GPIO43 | SPI2_CE0_N |
CE1 | GPIO44 | SPI2_CE1_N |
CE2 | GPIO45 | SPI2_CE2_N |
SPI Function | Header Pin | Broadcom Pin Name | Broadcom Pin Function |
---|---|---|---|
MOSI | 03 | GPIO02 | SPI3_MOSI |
MISO | 28 | GPIO01 | SPI3_MISO |
SCLK | 05 | GPIO03 | SPI3_SCLK |
CE0 | 27 | GPIO00 | SPI3_CE0_N |
CE1 | 18 | GPIO24 | SPI3_CE1_N |
SPI Function | Header Pin | Broadcom Pin Name | Broadcom Pin Function |
---|---|---|---|
MOSI | 31 | GPIO06 | SPI4_MOSI |
MISO | 29 | GPIO05 | SPI4_MISO |
SCLK | 26 | GPIO07 | SPI4_SCLK |
CE0 | 07 | GPIO04 | SPI4_CE0_N |
CE1 | 22 | GPIO25 | SPI4_CE1_N |
SPI Function | Header Pin | Broadcom Pin Name | Broadcom Pin Function |
---|---|---|---|
MOSI | 08 | GPIO14 | SPI5_MOSI |
MISO | 33 | GPIO13 | SPI5_MISO |
SCLK | 10 | GPIO15 | SPI5_SCLK |
CE0 | 32 | GPIO12 | SPI5_CE0_N |
CE1 | 37 | GPIO26 | SPI5_CE1_N |
SPI Function | Header Pin | Broadcom Pin Name | Broadcom Pin Function |
---|---|---|---|
MOSI | 38 | GPIO20 | SPI6_MOSI |
MISO | 35 | GPIO19 | SPI6_MISO |
SCLK | 40 | GPIO21 | SPI6_SCLK |
CE0 | 12 | GPIO18 | SPI6_CE0_N |
CE1 | 13 | GPIO27 | SPI6_CE1_N |
Signal name abbreviations
SCLK - Serial CLocK CE - Chip Enable (often called Chip Select) MOSI - Master Out Slave In MISO - Master In Slave Out MOMI - Master Out Master In
In Standard SPI mode the peripheral implements the standard 3 wire serial protocol (SCLK, MOSI and MISO).
In bidirectional SPI mode the same SPI standard is implemented, except that a single wire is used for data (MOMI) instead of the two used in standard mode (MISO and MOSI). In this mode, the MOSI pin serves as MOMI pin.
The LoSSI standard allows issuing of commands to peripherals (LCD) and to transfer data to and from them. LoSSI commands and parameters are 8 bits long, but an extra bit is used to indicate whether the byte is a command or parameter/data. This extra bit is set high for a data and low for a command. The resulting 9-bit value is serialized to the output. LoSSI is commonly used with MIPI DBI type C compatible LCD controllers.
NOTE | Some commands trigger an automatic read by the SPI controller, so this mode cannot be used as a multipurpose 9-bit SPI. |
---|---|
The CDIV (Clock Divider) field of the CLK register sets the SPI clock speed:
SCLK = Core Clock / CDIV
If CDIV is set to 0, the divisor is 65536. The divisor must be a multiple of 2, with odd numbers rounded down. Note that not all possible clock rates are usable because of analogue electrical issues (rise times, drive strengths, etc).
See the Linux driver section for more info.
Setup and hold times related to the automatic assertion and de-assertion of the CS lines when operating in DMA mode are as follows:
The default Linux driver is spi-bcm2835
.
SPI0 is disabled by default. To enable it, use raspi-config, or ensure the line dtparam=spi=on
is not commented out in /boot/config.txt
. By default it uses 2 chip select lines, but this can be reduced to 1 using dtoverlay=spi0-1cs
. dtoverlay=spi0-2cs
also exists, and without any parameters it is equivalent to dtparam=spi=on
.
To enable SPI1, you can use 1, 2 or 3 chip select lines, adding in each case:
dtoverlay=spi1-1cs #1 chip select dtoverlay=spi1-2cs #2 chip select dtoverlay=spi1-3cs #3 chip select
to the /boot/config.txt
file. Similar overlays exist for SPI2, SPI3, SPI4, SPI5 and SPI6.
The driver does not make use of the hardware chip select lines because of some limitations - instead it can use an arbitrary number of GPIOs as software/GPIO chip selects. This means you are free to choose any spare GPIO as a CS line, and all of these SPI overlays include that control - see /boot/overlays/README
for details, or run (for example) dtoverlay -h spi0-2cs
(dtoverlay -a | grep spi
might be helpful to list them all).
The driver supports all speeds which are even integer divisors of the core clock, although as said above not all of these speeds will support data transfer due to limits in the GPIOs and in the devices attached. As a rule of thumb, anything over 50MHz is unlikely to work, but your mileage may vary.
SPI_CPOL - Clock polarity SPI_CPHA - Clock phase SPI_CS_HIGH - Chip Select active high SPI_NO_CS - 1 device per bus, no Chip Select SPI_3WIRE - Bidirectional mode, data in and out pin shared
Bidirectional or "3-wire" mode is supported by the spi-bcm2835
kernel module. Please note that in this mode, either the tx or rx field of the spi_transfer struct must be a NULL pointer, since only half-duplex communication is possible. Otherwise, the transfer will fail. The spidev_test.c source code does not consider this correctly, and therefore does not work at all in 3-wire mode.
Interrupt mode is supported on all SPI buses. SPI0, and SPI3-6 also support DMA transfers.
This thread discusses latency problems.
spidev
presents an ioctl-based userspace interface to individual SPI CS lines. Device Tree is used to indicate whether a CS line is going to be driven by a kernel driver module or managed by spidev on behalf of the user; it is not possible to do both at the same time. Note that Raspberry Pi’s own kernels are more relaxed about the use of Device Tree to enable spidev
- the upstream kernels print warnings about such usage, and ultimately may prevent it altogether.
There is a loopback test program in the Linux documentation that can be used as a starting point. See the Troubleshooting section.
There are several Python libraries that provide access to spidev
, including spidev
(pip install spidev
- see https://pypi.org/project/spidev/) and SPI-Py
(https://github.com/lthiery/SPI-Py).
# Write binary 1, 2 and 3 echo -ne "\x01\x02\x03" > /dev/spidev0.0
There are other userspace libraries that provide SPI control by directly manipulating the hardware: this is not recommended.
This can be used to test SPI send and receive. Put a wire between MOSI and MISO. It does not test CE0 and CE1.
wget https://raw.githubusercontent.com/raspberrypi/linux/rpi-3.10.y/Documentation/spi/spidev_test.c gcc -o spidev_test spidev_test.c ./spidev_test -D /dev/spidev0.0 spi mode: 0 bits per word: 8 max speed: 500000 Hz (500 KHz) FF FF FF FF FF FF 40 00 00 00 00 95 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF DE AD BE EF BA AD F0 0D
Some of the content above has been copied from the elinux SPI page, which also borrows from here. Both are covered by the CC-SA license.